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Introduction to SONY’s All New Stacked CMOS Image Sensor Technology 2022-02-21

SONY has developed the world’s first stacked CMOS image sensor with 2-layer transistor pixels. In conventional image sensors, the photodiodes and pixel transistors are located on the same substrate, while SONY’s new production process separates them into different substrates. The new architecture significantly improves imaging performance by offering around double the saturation signal level, a wider dynamic range, and less noise than conventional photosensors. The new technology’s pixel structure allows pixels to retain or enhance their existing characteristics. It can be applied to existing or even smaller pixel sizes. SONY announced the technological breakthrough at the IEEE International Electronic Devices Meeting that commenced on December 11, 2021.

. Stacked CMOS Image Sensor Architectures

               
Conventional stacked CMOS image sensor (left)      Stacked CMOS image sensor with newly-developed 2-layer transistor diode (right)

Existing stacked CMOS image sensors consist of a pixel chip and logic IC chip stacked together. A back-illuminated pixel chip is stacked on top of a logic circuit for image signal processing. Within the pixel chip, the photodiodes for converting light into electronic signals and the pixel transistors used for signal control are arranged alongside each other on the same layer. Increasing the saturation signal level within the form-factor constraints of the photo-sensing component is essential for realizing outstanding image quality with a wide dynamic range.

Sony’s new architecture improves on existing stacked CMOS image sensor technology. Photodiodes and pixel transistors were packaged onto separate substrates using SONY’s proprietary technology before being stacked on top of each other. By comparison, conventional stacked CMOS image sensors place the photodiodes and pixel transistors alongside each other on the same substrate. The new stacking technology allows architectures that optimize the photodiode and pixel transistor layers. The saturation signal level is approximately double that of conventional image sensors, and the dynamic range is widened.
   
Since pixel transistors other than transfer gates (TRG) such as reset transistors (RST), select transistors (SEL) and amp transistors (AMP) are relocated to photodiode-free regions, then AMP can be increased in size as well. Increasing the AMP size allowed SONY to significantly reduce noise from imagery at night and in other dark environments. The wider dynamic range and noise reduction function of this new technology can be used to prevent over-exposure when images with high or low illumination. High-quality images with low noise can therefore be obtained even in low-light conditions (e.g. indoors and night-time).
 
The 2-layer transistor diode technology from SONY will make a significant contribution to the realization of high-quality smartphone photos.
 
                               Cross-section of CMOS image sensor with 2-layer transistor diode technology

Source:https://www.SONY-semicon.co.jp/e/news/2021/2021121601.html

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